The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
Some network switch devices comprise a plurality of packet processors interconnected by a fabric, such as a fabric comprising one or more crossbar devices. The packet processors each include a plurality of ports (network ports) coupled to a plurality of network links, and one or more ports (fabric ports) coupled to the fabric. In such devices, a packet is received via a first network port of a first packet processor, and the first packet processor analyzes the packet to determine via which other network port (e.g., a second network port) the packet is to be transmitted. When the second network port is a port of another one of the packet processors (e.g., a second packet processor), the first packet processor provides the packet to the fabric over a first group of one or more fabric ports, and the fabric, in turn, provides the packet to the second packet processor over a second group of one or more fabric ports. The second packet processor then transmits the packet via the second network port.
In one known approach, the packet is initially stored in an ingress queue of the first packet processor. A scheduler of the first packet processor determines when the packet can be provided to the crossbar. A scheduler of the crossbar then determines when the packet can be provided to the second packet processor. At the second packet processor, the packet is stored in a transmit queue. A scheduler of the second packet processor then determines when the packet can be transmitted via the second port of the second packet processor.